The present invention relates to a semiconductor device and a method for fabricating the same, more specifically a semiconductor device including interconnections formed of a material substituted with a metal or a metal silicide and a method for fabricating the semiconductor device.
Conventionally, as a gate electrode material of MOSFETs, the layer structure (polycide structure) of a polycrystalline silicon film and a silicide (metal silicide) film of tungsten (W) or cobalt (Co) has been widely used. The polycide structure has the merits that good MOS characteristics can be provided by the lower polycrystalline silicon film, and that the upper metal silicide film can lower the gate resistance. The polycide is a refractory material, which can stand the activation thermal processing for forming source/drain diffused layers, and permits the source/drain diffused layers to be formed by self-alignment with the gate electrodes.
The higher integration of the recent integrated circuits is conspicuous, and with this higher integration, the sizes of the gate electrodes are more diminished. The gate electrodes of the polycide structure have found it difficult to meet the requirement of higher speed. The gate electrodes are required to be formed of materials of lower resistance.
In such background, Reference 1 (Japanese published unexamined patent application No. Hei 11-251595/1999), Reference 2 (Japanese published unexamined patent application No. Hei 11-261063/1999), Reference 3 (Japanese published unexamined patent application No. 2001-024187) and Reference 4 (Japanese published unexamined patent application No. 2001-274379), for example, describe techniques which can form a source/drain diffused layer by self-alignment with the gate electrode and form the gate electrode of a metal material. References 1 to 4 disclose the technique of forming a source/drain diffused layer by self-alignment with a dummy gate electrode of polycrystalline silicon, and then substituting the polycrystalline silicon forming the dummy gate electrode with aluminum by thermal processing to thereby form the gate electrode formed of aluminum, and the technique of forming a source/drain diffused layer by self-alignment with a dummy gate electrode and then removing the dummy gate electrode to bury a metal material in the region where the dummy gate electrode has been formed, to thereby form the gate electrode of the metal.
Metal materials, such as aluminum, tungsten, molybdenum, titanium, tantalum, etc. have specific resistances of about 1/10˜ 1/100 of the specific resistances of the metal silicides and are useful as gate electrode materials of MOSFETs of below 0.1 μm. The use of single-layers of the metal silicides in place of the polycide structure is also effective to decrease the resistance value of the gate electrode. When the gate electrode is formed of the metal or the metal silicide, the depletion of the gate electrode, which is found in gate electrodes formed of polycrystalline silicon, does not occur. Accordingly, the gate capacitance can be small, i.e., the signal delay time can be short, and this is also a merit.
Reference 1 also proposes a technique that in an n-channel MOSFET and a p-channel MOSFET, the gate electrodes are formed of metals which agree with operational characteristics (work functions) of the respective MOSFETs.
Reference 5 (Japanese published unexamined patent application No. 2001-274379), Reference 6 (S. P. Murarka, “Silicides for VLSI Applications”, Academic Press, Inc., pp. 88˜95), and Reference 7 (Ming Quin et al., Journal of The Electrochemical Society, 148 (5) pp. G271˜G274 (2001)) also disclose the related arts.